Sequential Multi-core

It has been observed that there is a growing interest in multi-core/parallel computation in the planning community and the research in this area has raised a number of very interesting questions. So far, it is proposed to run a dedicated track for this purpose this year with the hope of providing useful information to the community. Since this is experimental, only the multi-core sequential satisficing track is considered in this IPC.

Thus, all the considerations discussed in the sequential satisficing track apply here as well, but computers with a number of cores (most likely four as the time of writing) will be available to run the planners.

Please, take into account the following remarks:

• While the code submitted to this track is expected to run in different cores simultaneously and/or with different threads on each core, no GPU computing will be available.
• Moreover, it is not the aim of this track to distribute work among different nodes of large clusters. Only one computer with a number of cores will be devoted to each planner.
• The winner in this track shall be chosen among the participants within the track. Therefore, no comparisons shall be made with the single-core tracks.